1. Field of the Invention
This invention relates to computer systems and, more particularly, to arrangements for converting numbers between formats for use in a matrix arithmetic section of an extremely fast graphics accelerator.
2. History of the Prior Art
In designing computer systems the emphasis is constantly on making such systems faster and able to handle larger amounts of information. Both of these points of emphasis translate directly into the accomplishment of more work. The ability of computers to do more work is also enhanced by their ability to do more different kinds of work. For example, computers have become of use in many new activities with the advent of computer graphics displays which allow the presentation of not only numbers and text materials but pictures representing the meanings of those numbers and adding to the meaning of the text material. The ability to rotate, translate, and scale those pictures has led to the extensive use of the computer in engineering drafting and design. It has gradually become the belief of a great number of people in the computer industry that a graphical output should be presented on almost all computer systems.
Unfortunately, the presentation of a graphics output display by a computer system requires a great deal of the processing power of that system. For example, the presentation of a single frame of graphical material on the computer display of a fairly standard-sized workstation requires that information regarding approximately one thousand pixels in a horizontal direction and approximately one thousand pixels in a vertical direction be stored. Thus, information must be stored which relates to approximately one million pixels for each frame to be displayed. In a system which is capable of providing a number of different colors on the output display, each of those pixels may contain eight bits of digital information regarding the particular pixel. Consequently, approximately eight million bytes of information needs to be handled and stored for each frame to be presented on the output display.
It will be understood that since frames are updated thirty times a second on the output display to create flicker free movement. The total amount of information required to be presented at the output display is a very large number. The simple matter of dealing with such a large amount of information in order to present a graphics output occupies a substantial amount of the time available for a central processing unit (CPU) and may substantially slow the operation of even the fastest of such processors. For this reason, it has become common for computer systems to include graphics accelerators capable of assisting the central processing unit in its operations by taking over some portion of the data processing function relating to the display of graphics on the computer output display. This offloading of some portion of the graphics processing functions from the central processing unit to a graphics accelerator can substantially increase the speed with which any particular computer system is able to process graphics information.
Consequently, attempts are being made to design very fast graphics accelerators. One of the major functions which may be accomplished by a graphics accelerator is to handle the matrix arithmetic necessary for moving graphics images about on the computer output display. Such matrix operations are necessary in handling both two and three-dimensional graphical figures in order to rotate, translate, scale, and otherwise manipulate the particular graphics figures to be displayed on the computer output display.
A graphics accelerator can be very useful in accomplishing these operations because it can relieve the central processing unit of the need to serially recompute various vertices of the figures to be manipulated with each manipulation of the figure to be displayed. A graphics accelerator may accomplish the many operations necessary by means of hardware manipulation of the data and greatly speed the operation of the computer system.
However, a major problem still remains in obtaining extremely rapid operations. This problem derives from the need of a graphics accelerator to manipulate data in a plurality of different number formats. For example, information handled by a central processing unit normally appears in an integer format and must appear in that format when utilized by an output display because a display does not deal in fractions of pixels. On the other hand, many manipulations with very large numbers used in scientific processing require the use of a floating point format. Such numbers must be dealt with in presenting graphics related to such scientific projects. It is clear that such floating point numbers must ultimately be translated into the integer format for presentation on a computer output display.
Additionally, the format described by the acronym FRACT is especially useful in manipulating a particular type of graphics display in a process referred to as shape manipulation. The use of such a computer graphics philosophy is described in co-pending U.S. patent application Ser. No. 07/252,589, entitled METHOD AND APPARATUS FOR IMAGE MANIPULATION, Rocchetti and Donato, filed Oct. 3, 1988, and assigned to the assignee of this invention. The FRACT number system uses an entirely different format than do the integer and floating point number systems.
In prior art computer systems, the central processing unit (CPU) has been called upon to accomplish most number conversions. Thus, although a floating point number may be processed by use of a floating point co-processor, it must ultimately be converted by a processor of the system into integer format so that it may be used in displaying a particular graphical output on a computer output display. The translation of numbers between different number formats by a processor is handled serially and substantially delays the operation of the system. For example, to translate a floating point number to an integer number using the central processing unit, it is necessary to tell the central processing unit the format in which the information is presented, tell the central processing unit the format in which the output is desired, then let the central processing unit refer to a subprocess for converting the number, derive the output of the subprocess, and ultimately use that new number-base system output. It should be obvious to all skilled in the art that this operation substantially slows the operation of any computer system.